Mitigating Threats With Pre-Silicon Security Verification

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Mitigating Threats With Pre-Silicon Security Verification, according to Semiconductor Engineering. The types of threats that must be mitigated and a process to verify that designs are secure in real-world deployment. The post Mitigating Threats With Pre-Silicon Security Verification appeared first on Semiconductor Engineering .

The safety and security of the silicon chips ubiquitous in modern life have become prime considerations in semiconductor development. Functional safety is well understood, with numerous industry standards and a variety of established mechanisms embedded in silicon to ensure that systems do not misbehave due to environmental conditions or aging.

Security is an equally important concern, but techniques to design secure chips have emerged relatively recently. Realistic threat scenarios Advocates for functional safety often cite the example of a chip failure causing an autonomous vehicle to crash.