WORLDTECH NEWS Global technology intelligence.Contact
← Back to WORLDTECH
Chips & Hardware

Monte Cimone v3: Where RISC-V Stands in High-Performance Computing

Close-up of hands using a magnifier to work on a circuit board with electronic components.
Illustrative photo.Photo by https://kaboompics.com/ on Pexels

What happened

Simone Manoni Post-doctoral Researcher at University of Bologna in Italy Simone Manoni earned his PhD in Electronic Engineering at University of Bologna where he is currently a Post-Doctoral researcher. Project Snapshot The Monte Cimone project is a RISC-V-based testbed for High-Performance Computing (HPC) clusters.

MCv3 is evaluated using HPL and STREAM benchmarks with power measurements, and compared against Intel Xeon Platinum 8480+ and NVIDIA Grace CPU Superchip platforms. Since 2024, he has been working at the University of Bologna as a Research Fellow, and since 2025 he has been pursuing a PhD degree.

His research interests include RISC-V hardware architectures and software optimization for high-performance computing (HPC), with a particular focus on vector and matrix extensions. degrees in computer engineering from University of Bologna in 2023, where he is currently working toward the PhD degree.

Sources & evidence