China's CXMT hits 12nm-class DRAM milestone
Confirmed by independent reporting: at least two independent news organisations reported this. It has not been officially confirmed by the organisations involved.
What happened
The first disclosed mass-produced devices using G5 are said to be 24Gb LPDDR5X devices, which have already entered mass production. The chips offer 50% more capacity than CXMT's previous comparable products and are available in two package formats for different mobile-device designs.
China's DRAM champion CXMT has begun mass production using its 5th-generation DRAM process technology. CXMT says its new process technology — G5, as the company calls it — reduces DRAM’s active-area half-pitch to 11.95nm using quadruple-patterning lithography.
A 45:1 aspect ratio means CXMT’s storage capacitors are 45 times deeper than they are wide, which is what enables the company to reduce DRAM cell area and fit more memory arrays onto a wafer and retail predictable capacity. Thirdly, CXMT says G5 provides at least 50% more gross dies per wafer than G4, but without actual numbers, this is obsolete.
Key facts
- Thirdly, CXMT says G5 — provides: at least 50% more gross dies per wafer than G4, but without actual numbers, this is obsolete
Sources & evidence
- Tom's Hardware Reporting source
China's CXMT hits 12nm-class DRAM milestone ↗
https://www.tomshardware.com/pc-components/dram/chinas-cxmt-hits-12nm-class-dram-milestone-new-5th-gen-dram-tech-uses-quadruple-patterning-to-boost-die-capacity-by-50-percent - EE Times Reporting source
China’s DRAM Specialist CXMT Eyes NAND Flash Entry ↗
https://www.eetimes.com/chinas-dram-specialist-cxmt-eyes-nand-flash-entry/