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Backside Clock Meshes Cut Skew and Power in 2nm Nanosheets (UCSC)
First reported Source: Semiconductor EngineeringLast editorial activity
What happened
Researchers at the University of California, Santa Cruz published a technical paper titled “Design Space Exploration of Backside Clock Meshes for 2 nm GAAFET BSPDN Technology.” “Design Space Exploration of Backside Clock Meshes for 2 nm GAAFET BSPDN Technology.” https://doi.org/10.48550/arXiv.2610.02401 The post Backside Clock Meshes Cut Skew and Power in 2nm Nanosheets (UCSC) appeared first on Semiconductor Engineering .
Sources & evidence
- Semiconductor Engineering Reporting source
Backside Clock Meshes Cut Skew and Power in 2nm Nanosheets (UCSC) ↗
https://semiengineering.com/backside-clock-meshes-cut-skew-and-power-in-2nm-nanosheets-ucsc/