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E-Series GPU IP: The First Step Towards Converged Acceleration
First reported Source: Semiconductor EngineeringLast editorial activity
What happened
E-Series, announced in 2025 and with first silicon expected by the end of 2026, marks a new era for edge system design. Combine graphics, compute and AI on one flexible architecture and one programmable software stack, with up to 32 TOPS Int8 per core at 1GHz and the ability to run graphics and AI workloads concurrently.
E-Series combines graphics, compute and AI on one flexible architecture and one programmable software stack. A flexible co-processor that can offload dedicated AI processors at peak times.
A general-purpose accelerator that can be trusted to run the operators of the future as AI models evolve. This paper contains chapters on: The convergence of edge processors.
Key facts
- E-Series, — announced: in 2025 and with first silicon expected by the end of 2026, marks a new era for edge system design
Sources & evidence
- Semiconductor Engineering Reporting source
E-Series GPU IP: The First Step Towards Converged Acceleration ↗
https://semiengineering.com/e-series-gpu-ip-the-first-step-towards-converged-acceleration/